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3-5 March 2008

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CSC-Live

CERN School of Computing 2008 25 August-5 September 2008 - Gjövik, Norway

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Special evening lecture

Thon Hotel, Room adjacent to the dining room 21:30

From Nano-Scale to Peta-Scale Computing

 

The lecture is given by Dr. Herbert Cornelius. 

He will be available today and tomorrow at all breaks and lunches / dinner to answers question and give more information.

Abstract  of the presentation

As we see Moore's Law still continuing, it now allows to implement a wider range of processors and computing platforms targeted towards its respective usage models and environments. Based on advanced Nano-Scale technologies it spans from tiny embedded System-on-a-Chip (SOC) to high-end Peta-Scale performance systems, enjoying a common core architecture with targeted and optimized value add-ons, as well as its comprehensive and well established software development eco-system. In addition, more and more features and parallelism are being introduced to all computing platforms on all levels of integration and programming. Especially in the area of High-Performance and High-Throughput Computing, users can entertain a combination of different hardware and software parallel architectures and programming environments. Those technologies range from single-core SIMD computation (vectorization) over multi-core shared memory multi-threading (e.g. OpenMP) to distributed memory message passing (e.g. MPI) on cluster systems. But it also puts more and more demand on application software and its development tools for parallel computing in respect to the various challenges and opportunities. This talk will cover major computer hardware architecture trends and its associated parallel software tools. We will touch on some of the respective software tools for the main phases of parallel software development: implementation, correctness, analysis and performance. For all tools, scalability and ease-of-use is very important to enable higher productivity for its users.

Herbert Cornelius

INTEL, Munich - Germany

Dr. Herbert Cornelius is Technical Director of the Intel Advanced Computing Center in EMEA and manages the Intel Parallel Applications Center worldwide, focusing on scalable parallel algorithms/applications and its implementation based on multi-threading and message passing utilizing multi-core/multi-processor cluster platforms. Prior to this position he was the EMEA Technical Marketing Manager Enterprise Computing und New Technologies Enabling. He joined Intel in 1993 as Computational Scientist in the Scalable Systems Division EMEA and has held various technical and management positions in the areas of Applications and Software Engineering. Before joining Intel, he served as Manager Supercomputing Europe at Fujitsu and worked at Cray Research from 1983 to 1990. Prior he worked as Assistant Professor for Applied Mathematics at the University of Karlsruhe. Cornelius received a Ph.D. degree in Mathematics and M.S. degree in Mathematics and Informatics from the Technical University of Berlin, Germany.

 

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