Tuesday 28th of August, 16:00
The seven proposal made at
the deadline, Saturday, 25 August, 12:30 have been
accepted the programme is therefore as follows:
All presentations will last
10 minutes maximum. A mentor is associated to each
presentation to briefly review the will review the slides.
Allowing 10 minutes per
presentation obliges to postpone the next two hours of the
day by 15 minutes.
Session Chair:
Ivica Puljak
Name |
Presentation title |
Description |
Mentor |
Andrzej Nowak
|
Multi-core and tera-scale computing |
A summary of the benefits of multi-core computing and challenges
ahead of HPC related to current trends in CPU
design. |
Andreas Hirtsius |
Emir Imamagic
|
Helping grid site admins survive day2day operations |
Presentation summarizes every day problems with grid site
administration (from the perspective of site admin).
Furthermore, short description and demo of prototype
monitoring solution done within Grid Service
Monitoring Working Group are given. |
Heinz Stockinger |
George Serbanut
|
Using Parallel Threads: Why? When? Where? |
Since people were interested why I used more than two parallel
threads when I had only two processing cores, and
because I was asked to share that information with
the others, I decided to create just few slides to
help people to understand this subject better. |
Ivica Puljak |
Guillaume Dargaud
|
Cold weather software |
Slides from 3 years of work in Antarctica doing atmospheric
science, including the first winter over at the new
Concordia station, far up on the Antarctic plateau. |
Fran?ois Fluckiger |
Jiri Kral
|
Detector Control System of SDD in ALICE |
Overview of how the experiment hardware is operated and status
data acquired and processed. Most possibly will
include a life demonstration of partially enabling
the detector. |
Rudi Fr?wirth |
Jose Miguel Dana Perez
|
Auto deployment and configuration of Grid resources on demand |
One of our main fields of interest in CERN openlab is
virtualization. Using virtualization we can deploy
virtual machines on demand and adapt their
configuration to users' requirements. In addition,
we are working together with HP Labs (Palo Alto,
USA) and we are using one of their projects (Tycoon)
in order to reach a market driven approach. |
Andreas Hirtsius |
Manfred Muecke
|
Algorithms on Speed |
Programmable Logic (FPGAs) enables implementation of algorithms
in hardware, providing orders of magnitude better
performance when compared to software running on
conventional CPUs. But why? And is it true for all
algorithms? And is it just for hardware cracks, or
is there a way to access this option from
conventional programming environments? We will see
:-) |
Rudi Fr?wirth |
|